What Does Bank And Offset Mean In A Register Embedded Systems

A technique to increase the amount of usable memory

A hypothetical retentiveness map of bank-switched memory for a processor that tin only accost 64 KB. This scheme shows 200 KB of retentivity, of which only 64 KB can exist accessed at any fourth dimension by the processor. The operating arrangement must manage the bank-switching performance to ensure that program execution can proceed when part of memory is not accessible to the processor.

Bank switching is a technique used in computer blueprint to increase the amount of usable memory beyond the corporeality directly addressable by the processor^[1] instructions. It can exist used to configure a system differently at different times; for case, a ROM required to start a arrangement from diskette could be switched out when no longer needed. In video game systems, bank switching immune larger games to be developed for play on existing consoles.

Bank switching originated in minicomputer systems.^[2] Many mod microcontrollers and microprocessors use banking concern switching to manage random-admission retention, non-volatile retentivity, input-output devices and system direction registers in small embedded systems. The technique was common in 8-flake microcomputer systems. Bank-switching may besides be used to piece of work effectually limitations in address bus width, where some hardware constraint prevents straightforward addition of more accost lines, and to piece of work around limitations in the ISA, where the addresses generated are narrower than the address jitney width. Some control-oriented microprocessors utilize a depository financial institution-switching technique to access internal I/O and command registers, which limits the number of register address $.25 that must be used in every instruction.

Different retentivity management by paging,^{[ citation needed ]} data is not exchanged with a mass storage device like disk storage. Data remains in quiescent storage in a retentiveness area that is not currently attainable to the processor (although it may be accessible to the video display, DMA controller, or other subsystems of the computer) without the use of special prefix instructions.

Technique [edit]

Bank switching can exist considered as a fashion of extending the address space of processor instructions with some register. Examples:

The follow-on system^[3] to a processor with a 12 bit address has a 15 scrap accost bus, but there is no style to directly specify the high three bits on the address bus. Internal bank registers can be used to provide those bits.
The follow-on system^[four] to a processor with a 15 bit address has an 18 scrap address motorcoach, but legacy instructions only have 15 address bits; internal bank registers can be used to provide those bits. Some new instructions tin explicitly specify the bank.

A processor with a 16-bit external address bus tin only accost ii^sixteen = 65536 memory locations. If an external latch was added to the system, it could exist used to control which of two sets of memory devices, each with 65536 addresses, could exist accessed. The processor could alter which set up is in current use by setting or clearing the latch bit.
The latch tin be set or cleared by the processor in several ways; a detail memory address may be decoded and used to control the latch, or, in processors with separately-decoded I/O addresses, an output accost may exist decoded. Several bank-switching control bits could be gathered into a annals, approximately doubling the available memory spaces with each additional bit in the register.
Because the external banking company-selecting latch (or register) is not straight connected with the program counter of the processor, it does not automatically change state when the program counter overflows; this cannot be detected by the external latch since the plan counter is an internal register of the processor. The extra memory is not seamlessly available to programs. Internal registers of the processor remain at their original length, so the processor cannot directly span all of bank-switched memory by, for example, incrementing an internal register.^[v] Instead the processor must explicitly do a bank-switching operation to admission big retentiveness objects. There are other limitations. Generally^{[ citation needed ]} a banking company-switching system will have i block of plan memory that is common to all banks; no matter which banking company is currently agile, for function of the accost infinite just one set of retentivity locations will be used. This surface area would exist used to hold lawmaking that manages the transitions between banks, and also to procedure interrupts.

Frequently a unmarried database spans several banks, and the need arises to motility records betwixt banks (as for sorting). If only ane banking company is accessible at a fourth dimension, it would be necessary to move each byte twice: offset into the common memory area, perform a depository financial institution switch to the destination bank, and then actually to move the byte into the destination banking company. If the computer architecture has a DMA engine or a second CPU, and its bank admission restrictions differ, whichever subsystem can transfer data directly betwixt banks should exist used.

Dissimilar a virtual retentiveness scheme, bank-switching must be explicitly managed past the running plan or operating system; the processor hardware cannot automatically detect that information non currently mapped into the active bank is required. The application programme must keep track of which memory bank holds a required piece of information, and then call the bank-switching routine to make that bank active.^[6] Withal, banking company-switching can access data much faster than, for instance, retrieving the information from disk storage.

Microcomputer use [edit]

Depository financial institution select switch on Cromemco memory lath was used to map the memory into i or more than of 8 singled-out 64 KB banks.^[7]

Processors with 16-scrap addressing (8080, Z80, 6502, 6809, etc.) usually used in early video game consoles and dwelling computers can directly address only 64 KB. Systems with more memory had to dissever the accost space into a number of blocks that could be dynamically mapped into parts of a larger accost infinite. Banking concern switching was used to achieve this larger address infinite by organizing memory into dissever banks of upwards to 64 KB each.^[8] Blocks of various sizes were switched in and out via depository financial institution select registers or similar mechanisms. Cromemco was the first microcomputer manufacturer to use bank switching, supporting 8 banks of 64 KB in its systems.^[9]

When using bank switching some caution was required in order non to corrupt the handling of subroutine calls, interrupts, the machine stack, and and then on. While the contents of retentivity temporarily switched out from the CPU was inaccessible to the processor, it could be used past other hardware, such as video display, DMA, I/O devices, etc. CP/G-eighty three.0 released in 1983 and the Z80-based TRS-80s the Model 4 and Model Two supported bank switching to allow use of more than the 64 KB of retentivity that the 8080 or Z80 processor could address.^[x]

Bank switching immune extra memory and functions to be added to a estimator design without the expense and incompatibility of switching to a processor with a wider address bus. For case, the C64 used banking company switching to allow for a full 64 KB of RAM and still provide for ROM and memory-mapped I/O as well. The Atari 130XE could let its two processors (the 6502 and the Caper) to access separate RAM banks, allowing programmers to make large playfields and other graphic objects without using upward the retentiveness visible to the CPU.

Microcontrollers [edit]

Microcontrollers (microprocessors with pregnant input/output hardware integrated on-chip) may employ banking concern switching, for example, to access multiple configuration registers or on-scrap read/write memory. An example is the Motion picture microcontroller. This allows short instruction words to save space during routine program execution, at the toll of extra instructions required to access relatively infrequently used registers, such equally those used for system configuration at start-up.

The IBM PC [edit]

Expanded memory in the IBM PC

In 1985, the companies Lotus and Intel introduced Expanded Retentivity Specification (Ems) 3.0 for use in IBM PC compatible computers running MS-DOS. Microsoft joined for versions 3.2 in 1986 and 4.0 in 1987 and the specification became known as Lotus-Intel-Microsoft Ems or LIM Ems.^[6] ^[xi] ^[12] Information technology is a form of bank switching technique that allows more than the 640 KB of RAM defined by the original IBM PC architecture, past letting it appear piecewise in a 64 KB "window" located in the Upper Retentiveness Area.^[xiii] The 64 KB is divided into 4 xvi KB "pages" which tin each be independently switched. Some computer games made use of this, and though European monetary system is obsolete, the characteristic is nowadays emulated by later Microsoft Windows operating systems to provide backwards compatibility with those programs.

The later eXtended Memory Specification (XMS), besides now obsolete, is a standard for, in principle, simulating banking company switching for memory above ane MB (called "extended memory"), which is non straight addressable in the Existent Fashion of x86 processors in which MS-DOS runs. XMS allows extended memory to be copied anywhere in conventional memory, so the boundaries of the "banks" are not stock-still, but in every other way it works like the bank switching of EMS, from the perspective of a program that uses information technology. Later versions of MS-DOS (starting circa version five.0) included the EMM386 commuter, which simulates European monetary system memory using XMS, allowing programs to use extended retentivity even if they were written for EMS. Microsoft Windows emulates XMS also, for those programs that crave it.

Video game consoles [edit]

Bank switching was besides used in some video game consoles.^[14] The Atari 2600, for example, could only address 4 KB of ROM, and then afterward 2600 game cartridges independent their ain bank switching hardware in club to permit the use of more ROM and thus allow for more sophisticated games (via more program code and, equally of import, larger amounts of game data such equally graphics and different game stages).^[15] The Nintendo Entertainment System contained a modified 6502 but its cartridges sometimes contained a megabit or more of ROM, addressed via banking company switching called a Multi-Retentiveness Controller. Game Male child cartridges used a chip called MBC (Retention Bank Controller), which not only offered ROM banking company switching, but too cartridge SRAM bank switching, and even access to such peripherals as infrared links or rumble motors. Bank switching was nonetheless being used on later game systems. Several Sega Mega Bulldoze cartridges, such as Super Street Fighter Ii were over four MB in size and required the apply of this technique (four MB being the maximum address size). The GP2X handheld from Gamepark Holdings uses bank switching in order to command the start address (or retentivity first) for the second processor.

Video processing [edit]

In some types of computer video displays, the related technique of double buffering may be used to better video performance. In this instance, while the processor is updating the contents of 1 set of physical retentiveness locations, the video generation hardware is accessing and displaying the contents of a second set. When the processor has completed its update, it can signal to the video display hardware to swap active banks, so that the transition visible on screen is free of artifacts or distortion. In this instance, the processor may have access to all the memory at once, but the video display hardware is bank-switched between parts of the video memory. If the two (or more) banks of video memory contain slightly dissimilar images, rapidly cycling (page-flipping) betwixt them can create animation or other visual effects that the processor might otherwise be besides tiresome to carry out directly.

Alternative and successor techniques [edit]

Bank switching was afterwards supplanted by segmentation in many 16-bit systems, which in turn gave way to paging retention management units. In embedded systems, all the same, bank switching is yet ofttimes used for its simplicity, low cost, and often better accommodation to those contexts than to full general purpose computing.

Run across also [edit]

Sideways address space, an example of depository financial institution switching on the BBC Micro
Overlay (programming)

References [edit]

^ Aspinall, D., ed. (1978). The Microprocessor and its application: an avant-garde course. Cup Archive. pp. 47–fifty. ISBN0-521-22241-9.
^ Bong, C. Gordon; Newell, Allen (1971). Computer structures: readings and examples . McGraw Hill. pp. 156.
^ "Storage Control". Control Data 160-A Computer Programming Manual (PDF). CDC. March 1963. p. 2-09. 145e.
^ Command Data 3600 Calculator Arrangement Reference Transmission (PDF). CDC. 60021300E.
^ Heath, Steve (2003). Embedded systems pattern . Newnes. pp. 242. ISBN0-7506-5546-1.
^ ^a ^b Mueller, Scott (1992). Upgrading and Repairing PCs (2 ed.). Que Books. pp. 699–700. ISBN0-88022-856-3 . Retrieved 2020-02-08 . {{cite book}}: CS1 maint: url-status (link)
^ Garland, Harry (March 1977). "Pattern Innovations in Personal Computers". Calculator. IEEE Computer Society. x (3): 25. doi:10.1109/c-m.1977.217669. S2CID 32243439. Retrieved 2020-02-08 . An eight-position DIP switch on such cards is used to select one (or more) of eight banks of memory. {{cite journal}}: CS1 maint: url-status (link)
^ Garland, Harry (1979). Introduction to Microprocessor System Design . McGraw-Hill Book Company. p. 93. ISBN0-07-022871-X . Retrieved 2020-02-08 . With memory banking concern select, memory space is arranged in a number of separate banks of up to 64K each. {{cite book}}: CS1 maint: url-status (link)
^ Hogan, Thom (1981-06-08). "Share and Share Alike: Multiuser Hardware Explained". InfoWorld. Vol. 3, no. xi. p. 18. Retrieved 2020-02-08 . Cromemco was the first microcomputer manufacturer to refine and exploit bank switching. {{cite news}}: CS1 maint: url-status (link)
^ Freiberger, Paul (1982-10-25). "Digital Research offers CP/M upgrade". InfoWorld. p. ane.
^ "New 1-2-3 Gets 4 Megabytes of Memory, Lotus, Intel Interruption PC DOS Memory Barrier". InfoWorld. 1985-04-29.
^ "EMS Update Gives DOS Improved Multitasking". InfoWorld. 1987-08-17.
^ Ross, Paul W., ed. (1995). The Handbook of Software for Engineers and Scientists. CRC Printing. p. 26. ISBN0-8493-2530-7.
^ Sinofsky, Brian (2002). Carey, Charles W. (ed.). American inventors, entrepreneurs & business visionaries. Infobase Publishing. pp. 322–324. ISBN0-8160-4559-3 . Retrieved 2020-02-08 . {{cite book}}: CS1 maint: url-status (link)
^ K, Joe; Russell, Ryan; Mitnick, Kevin D. (2004). Hardware hacking: have fun while voiding your warranty. Syngress. pp. 229. ISBN1-932266-83-half dozen . Retrieved 2020-02-08 . {{cite book}}: CS1 maint: url-status (link)